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System on Chip Interfaces for Low Power Design

Contributor(s): Mishra, Sanjeeb (Author), Singh, Neeraj Kumar (Author), Rousseau, Vijayakrishnan (Author)

ISBN: 9780128016305

Publisher: Morgan Kaufmann Publishers

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Pub Date: December 8, 2015

Dewey: 621.3815

Lexile Code: 0000

Target Age Group: NA to NA

Physical Info: 0.90" H x 9.20" L x 7.40" W ( 1.85 lbs) 406 pages

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Description:

System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The book offers a common context to help understand the variety of available interfaces and make sense of technology from different vendors aligned with multiple standards. With particular emphasis on power as a factor, the authors explain how each interface performs in various usage scenarios and discuss their advantages and disadvantages. Readers learn to make educated decisions on what interfaces to use when designing systems and gain insight for innovating new/custom interfaces for a subsystem and their potential impact.

Brief description: Sanjeeb Mishra is a Validation Architect with Intel. He has 15 years of experience ranging from hardware system design to SOC validation for telecom, consumer electronics, PC and mobility products; and has specific expertise on SoC architecture for mobile devices.

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